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About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com. Key Responsibilities Design and develop key analog and mixed-signal IP blocks such as: Amplifiers (op-amps, instrumentation amps) Comparators Data converters (SAR, delta-sigma, pipeline familiarity) Bandgap references and regulators (LDO, DC-DC basics) Monitoring circuits (POR, power-good, etc.) Contribute to architecture discussions and design tradeoff analysis with senior team members Perform transistor-level schematic design, simulation, and verification using industry-standard EDA tools Analyze circuit performance across PVT conditions including: Corner simulations Monte Carlo mismatch analysis Noise and reliability considerations Work closely with layout engineers to ensure parasitic-aware design and performance closure Support and contribute to design reviews and verification planning Participate in silicon bring-up, validation, and debugging activities Collaborate across disciplines including layout, verification, and SoC integration teams Generate clear documentation for design specifications, simulations, and validation results Other Responsibilities Perform all activities in a safe and responsible manner and support Environmental, Health, Safety & Security requirements and programs Mentorship of junior design/layout engineers in design best practices and effective collaboration Required Qualifications Bachelor’s or master’s degree in electrical engineering or related field 10-15 years of experience in analog or mixed-signal IC design. Solid understanding of analog design fundamentals: Device operation, biasing, gain, bandwidth Stability and compensation Noise, mismatch, and process variation Experience with transistor-level design and simulation in CMOS technologies Familiarity with industry-standard EDA tools (Cadence Virtuoso, Spectre, etc.) Ability to run and analyze simulations across PVT and variability conditions Strong analytical and debugging skills Basic scripting skills (Python, MATLAB, or similar) are a plus Good communication and documentation skills Ability to work effectively in cross-functional, global teams Preferred Qualifications Experience designing one or more analog blocks from spec to simulation (partial or full ownership) Exposure to silicon validation and lab debugging Familiarity with layout concepts and parasitic effects Experience with low-power design techniques Exposure to advanced nodes such as Bulk CMOS, FDSOI, or FinFET Experience contributing to tape out or silicon-proven designs Expected Salary Range $153,000.00 - $265,000.00 The exact Salary will be determined based on qualifications, experience and location. If you need a reasonable accommodation for any part of the employment process, please contact us by email at usaccommodations@gf.com and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address. An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations. GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory. All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law
Here's how to pick the right one and stand out in your application.
144.883Jobs
31.687IN
81%EN
That number is real. WorkMundi's database shows 144,883 open engineer roles across the world. India has the most with 31,687 jobs, followed by the United States with 30,084. If you just finished reading one job ad and felt paralyzed by choice, you're not alone—but this scale is actually an advantage. It means you can afford to be selective.
Start by geography and language. The majority of engineer ads—117,837 of them—have the job posting text written in English. Use that as one filter, but remember: the ad text language tells you nothing about whether the role actually requires you to speak English day-to-day. Read the job description carefully. Then check which countries have the volume you're targeting. Singapore, Poland, and Australia round out the top five after India and the US.
Next, learn who's hiring. Accenture has posted 2,801 engineer roles. andurilindustries, speechify, and jobgether are also actively recruiting. If you're applying to one of these names, research their hiring patterns and interview style before you apply. That homework pays off.
When you interview, expect the question every engineer hears: 'Tell me about a time you had to debug a problem that wasn't in your job description.' Have a specific story ready—not a general one. Name the tools, the deadline pressure, and what you learned. Hiring managers listen for whether you see problem-solving as part of the role itself, not a favour.