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About GlobalFoundries GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to some of the world’s most inspired technology companies. With a global manufacturing footprint spanning three continents, GlobalFoundries makes possible the technologies and systems that transform industries and give customers the power to shape their markets. For more information, visit www.gf.com. Introduction The Quantum PDK Design Enablement (MTS) role is a technical contributor within the Quantum Technology Solutions organization focused on enabling scalable quantum computing platforms. This position supports development of Process Design Kits (PDKs), compact models, and design enablement infrastructure that bridge advanced quantum device physics with semiconductor manufacturing and circuit design, including cryogenic control and readout ICs. This role operates at the intersection of device physics, modeling, and EDA, translating emerging quantum device technologies into usable, manufacturable, and customer-ready design environments. Summary of Role As a Member of Technical Staff, this role contributes to the development, deployment, and support of PDKs for quantum device platforms and associated cryogenic electronics. The engineer will work on compact modeling, device libraries, test chip development, and EDA integration, ensuring accurate, validated, and production-ready design collateral. The position emphasizes hands-on technical execution, automation, and strong cross-functional collaboration across device engineering, process integration, modeling, and design teams to enable scalable and high-performance quantum systems. Essential Responsibilities Develop, deploy, and maintain PDKs (tech files, model files, rule decks, runtime code) for quantum devices and cryogenic control/readout ICs Create device libraries and parameterized cells (PCells), translating process design rules and SPICE/model specifications into design-ready implementations Support compact model development, parameter extraction, and correlation across TCAD, silicon data, and cryogenic characterization Integrate and validate PDKs within EDA environments (e.g., LVS/DRC, simulation flows), including development of automation tools representing fab processes Design test structures and test chips, and develop validation plans to ensure model accuracy and silicon correlation Develop and execute QA workflows, including DRC/LVS test cases and release validation, to ensure high-quality customer deliveries Analyze device and circuit data to identify variability, reliability risks, and performance trends; support yield-learning and root-cause analysis Create and maintain PDK documentation (release notes, application notes, known issues) and communicate usage guidance to users Collaborate cross-functionally with device, process, integration, and EDA teams to align design enablement with technology capabilities Contribute innovative ideas that may lead to intellectual property, patents, or advanced design enablement methodologies Other Responsibilities: Perform all activities in a safe and responsible manner and support all Environmental, Health, Safety & Security requirements and programs. Required Qualifications BS (MS preferred) in Electrical Engineering, Microelectronics, Physics, Computer Science, or related field ~5–6+ years of experience in semiconductor design enablement, PDK development, or EDA Strong knowledge of semiconductor device physics and electronic devices Experience with EDA tools (e.g., Cadence Virtuoso or similar) and design flows Experience with device modeling, test structures, or silicon validation Familiarity with scripting (e.g., Python, Tcl, Perl) and Unix/Linux environments Strong analytical, debugging, and problem-solving skills Effective communication and teamwork skills; detail-oriented and self-motivated Preferred Qualifications Experience with Cadence SKILL, PCell development, and PDK architectures Background in TCAD simulation and compact model correlation Familiarity with variability modeling, SPC, or statistical analysis methods Experience with cryogenic electronics or low-temperature device behavior Exposure to quantum devices, superconducting systems, or quantum computing hardware Experience working with EDA vendors or enabling custom design flows Knowledge of ML/AI techniques applied to modeling or EDA workflows Expected Salary Range $98,000.00 - $176,000.00 The exact Salary will be determined based on qualifications, experience and location. If you need a reasonable accommodation for any part of the employment process, please contact us by email at usaccommodations@gf.com and let us know the nature of your request and your contact information. Requests for accommodation will be considered on a case-by-case basis. Please note that only inquiries concerning a request for reasonable accommodation will be responded to from this email address. An offer with GlobalFoundries is conditioned upon the successful completion of pre-employment conditions, as applicable, and subject to applicable laws and regulations. GlobalFoundries is fully committed to equal opportunity in the workplace and believes that cultural diversity within the company enhances its business potential. GlobalFoundries goal of excellence in business necessitates the attraction and retention of highly qualified people. Artificial barriers and stereotypic biases detract from this objective and may be illegally discriminatory. All policies and processes which pertain to employees including recruitment, selection, training, utilization, promotion, compensation, benefits, extracurricular programs, and termination are created and implemented without regard to age, ethnicity, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, sexual orientation, gender identity or expression, veteran status, or any other characteristic or category specified by local, state or federal law
Here's how to pick the right one and stand out in your application.
144.883Jobs
31.687IN
81%EN
That number is real. WorkMundi's database shows 144,883 open engineer roles across the world. India has the most with 31,687 jobs, followed by the United States with 30,084. If you just finished reading one job ad and felt paralyzed by choice, you're not alone—but this scale is actually an advantage. It means you can afford to be selective.
Start by geography and language. The majority of engineer ads—117,837 of them—have the job posting text written in English. Use that as one filter, but remember: the ad text language tells you nothing about whether the role actually requires you to speak English day-to-day. Read the job description carefully. Then check which countries have the volume you're targeting. Singapore, Poland, and Australia round out the top five after India and the US.
Next, learn who's hiring. Accenture has posted 2,801 engineer roles. andurilindustries, speechify, and jobgether are also actively recruiting. If you're applying to one of these names, research their hiring patterns and interview style before you apply. That homework pays off.
When you interview, expect the question every engineer hears: 'Tell me about a time you had to debug a problem that wasn't in your job description.' Have a specific story ready—not a general one. Name the tools, the deadline pressure, and what you learned. Hiring managers listen for whether you see problem-solving as part of the role itself, not a favour.