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LEAD BEHAVIORAL MODELING ENGINEER LATTICE SEMICONDUCTOR INDIA Location: Hyderabad / Pune / Chennai (India) JOB SUMMARY We are seeking a Lead Behavioral Modeling Engineer to join Lattice Semiconductor's FPGA Architecture & Design team. You will lead development of behavioral and architecture models for next-generation low-power FPGA fabrics, own power and timing characterization, and mentor a small modeling team. This is a technical leadership role focused on modeling methodology and design optimizationnot traditional product RTL design or verification. KEY RESPONSIBILITIES Develop and maintain behavioral models for FPGA fabric elements (CLBs, routing, interconnects, logic blocks)Own power and timing characterization across PVT (Process, Voltage, Temperature) cornersBuild Python-based automation flows for rapid design exploration and PPA analysisLead modeling methodology improvements and drive continuous optimizationCollaborate with architecture, RTL, and circuit design teams to validate design intentMentor and guide modeling engineers on best practices and technical excellenceCorrelate behavioral models against silicon measurements and real chip dataEstablish and communicate modeling standards and documentation REQUIRED QUALIFICATIONS Bachelor's degree in Electrical Engineering or related field (Master's preferred)8+ years in behavioral/architecture modeling or FPGA/ASIC design2+ years of technical leadership experienceProficiency in C++, SystemC, and Python for model developmentDeep knowledge of FPGA fabric architecture (CLBs, LUTs, routing, interconnects)Strong understanding of power and timing characterization methodologiesExcellent problem-solving and technical communication skillsAbility to lead cross-functional teams and drive collaborative efforts PREFERRED QUALIFICATIONS Master's degree (M.Tech, MS) in Electrical/Computer EngineeringPrior experience at semiconductor companies Published papers or patents in FPGA modeling or architecture optimizationExperience with ML-based power prediction or on-die sensor integrationTest-chip bring-up and silicon validation experience WHAT YOU WILL NOT BE DOING This role is NOT focused on: Verilog/VHDL/SystemVerilog code development for product designSystemVerilog testbench and formal verificationGate-level or post-layout simulationTraditional Design Verification (DV)Physical design (place & route, floorplanning) If your background is primarily RTL design or DV, this may not be the right fit. WHY LATTICE SEMICONDUCTOR Lattice is the global leader in low-power FPGA solutions for edge AI, automotive, aerospace, and IoT. Your modeling work directly impacts next-generation FPGA architectures and time-to-market for innovative products. We offer: Deep technical challenge and leadership opportunityCollaborative, innovation-driven cultureHigh-impact products used globallyCompetitive compensation and benefits .
Here's how to pick the right one and stand out in your application.
144.883Jobs
31.687IN
81%EN
That number is real. WorkMundi's database shows 144,883 open engineer roles across the world. India has the most with 31,687 jobs, followed by the United States with 30,084. If you just finished reading one job ad and felt paralyzed by choice, you're not alone—but this scale is actually an advantage. It means you can afford to be selective.
Start by geography and language. The majority of engineer ads—117,837 of them—have the job posting text written in English. Use that as one filter, but remember: the ad text language tells you nothing about whether the role actually requires you to speak English day-to-day. Read the job description carefully. Then check which countries have the volume you're targeting. Singapore, Poland, and Australia round out the top five after India and the US.
Next, learn who's hiring. Accenture has posted 2,801 engineer roles. andurilindustries, speechify, and jobgether are also actively recruiting. If you're applying to one of these names, research their hiring patterns and interview style before you apply. That homework pays off.
When you interview, expect the question every engineer hears: 'Tell me about a time you had to debug a problem that wasn't in your job description.' Have a specific story ready—not a general one. Name the tools, the deadline pressure, and what you learned. Hiring managers listen for whether you see problem-solving as part of the role itself, not a favour.