Semiconductor Solution Architect (Physical Design / Design Verification)

About the Opportunity We are hiring experienced Semiconductor Solution Architects for a leading global engineering and technology consulting organization delivering advanced silicon design solutions for enterprise customers. This opportunity is ideal for professionals with deep expertise in SoC Physical Design or SoC Design Verification who have successfully driven multiple chip tape-outs on advanced technology nodes. Location: Bangalore Experience: 12+ Years / 14+ Years Work Mode: Work From Office Role 1: Physical Design Solution Architect Key Responsibilities Lead end-to-end Physical Design implementation for complex SoCs.Define floorplanning, partitioning, clocking, power, congestion, and implementation strategies.Drive PPA optimization from specification through GDS-II.Perform feasibility studies and QoR analysis.Guide global implementation teams and review sign-off readiness.Support customer solutioning and technical estimations. Required Skills 12+ years of Physical Design experience.Multiple tape-outs on 10nm or below technology nodes.Strong expertise in:FloorplanningCTSTiming ClosurePower OptimizationHands-on experience with:Synopsys ICC2 / Fusion CompilerCadence InnovusUPF and Multi-Voltage Design experience.Large SoC implementation (>100M gates).Experience supporting multiple projects simultaneously. Good to Have 5nm / 3nm implementationChiplet Architecture3DICHBM IntegrationHPC or Automotive SoCsAI-driven EDA tools (DSO, Cerberus, etc.) Role 2: Design Verification Solution Architect Key Responsibilities Define verification architecture and strategy for large SoCs.Lead SoC/IP verification through tape-out.Build and guide UVM-based verification environments.Drive coverage closure and verification planning.Lead emulation, FPGA, low-power, and performance verification.Standardize verification methodologies and automation. Required Skills 12+ years of Design Verification experience.Multiple successful SoC verification tape-outs.Expert in:SystemVerilogUVMAssertionsExperience with:SoC Boot VerificationARM / RISC-V SubsystemsSecurity SubsystemsNoCDebugExperience with:PCIeDDREthernetUCIeKnowledge of Palladium, Zebu, or Veloce.AI-assisted verification workflows. Good to Have Formal VerificationFunctional SafetyPortable Stimulus (PSS)Hardware/Software Co-VerificationHBM/HMC Memory Systems Job Details Experience: 12+ Years / 14+ YearsLocation: BangaloreWork Mode: Work From OfficeCompensation: Best in Industry (Aligned with Experience)Notice Period: Immediate to Short Joiners Preferred .