Job Description [What you will do] You will be in a energetic team working on advanced technology development, as the pioneer to setup leading edge design platform for MediaTek multi-vertical projects. Develop complex circuit block, test key for leading-edge process node (planar, finfet, nanosheet) from schematic netlist to gds. Develop standard cell library from architecture evaluation, PPA assessment and customized cell design with different PPA purpose and IP blocks. Work with layout engineer for design implementation and physical verification including DRC/LVS/ERC/ANT. Perform layout extraction, simulation, analyze simulation data, including performance, power, leakage, for layout dependent effect study. Work with digital team and testing team for design implementation and chip level silicon data collection. Develop processing flow for silicon data analysis, visualization, AI model regression. Develop advanced library generation methodology and flow, including characterization, kit generation, regression, and quality assurance. Perform timing/power/constraint/noise/LVF variation characterization for standard cell or complex circuit blocks. Work with circuit designer and tool vendors to tackle modelling difficulties, like accuracy and runtime issues, especially for complex circuit blocks. Responsible for new kits enablement and evaluation, like EM characterization, aging characterization. Involve with data analysis and machine learning as well for circuit performance and power assessment. Main Requirements and Qualifications [What you bring] BS/MS in Electrical and Electronic Engineering/Computer Engineering/Computer Science with minimum 3 years(MS) or 5 years(BS) industry experience. (We have entry level position with the same function, no prior experience is required.) Familiar with Python, Perl, Tcl or C/C++ for flow development and data analysis, machine learning. Basic knowledge of digital design and/or circuit design. Solid understanding of foundation IP design, with device physics, transistor level circuit, layout dependent effect knowledge. Experience of test chip design in FinFet/Nanosheet technologies is a plus, with understanding of DRM, layout rules, PV check, and simulation skills. Strong communication and teamwork skills to collaborate effectively with cross-functional teams.
Here's how to pick the right one and stand out in your application.
144.883Jobs
31.687IN
81%EN
That number is real. WorkMundi's database shows 144,883 open engineer roles across the world. India has the most with 31,687 jobs, followed by the United States with 30,084. If you just finished reading one job ad and felt paralyzed by choice, you're not alone—but this scale is actually an advantage. It means you can afford to be selective.
Start by geography and language. The majority of engineer ads—117,837 of them—have the job posting text written in English. Use that as one filter, but remember: the ad text language tells you nothing about whether the role actually requires you to speak English day-to-day. Read the job description carefully. Then check which countries have the volume you're targeting. Singapore, Poland, and Australia round out the top five after India and the US.
Next, learn who's hiring. Accenture has posted 2,801 engineer roles. andurilindustries, speechify, and jobgether are also actively recruiting. If you're applying to one of these names, research their hiring patterns and interview style before you apply. That homework pays off.
When you interview, expect the question every engineer hears: 'Tell me about a time you had to debug a problem that wasn't in your job description.' Have a specific story ready—not a general one. Name the tools, the deadline pressure, and what you learned. Hiring managers listen for whether you see problem-solving as part of the role itself, not a favour.